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@REPLYADDR Lynn Wheeler <lynn@garlic.com>
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Michael S <already5chosen@yahoo.com> writes:
> IIRC, z10 was IBM`s last "native CISC" design in zArch series.
> Starting from z196 they crack load-op into 2 or more uOus, just
> like majority of x86 cores does.
> It`s hard to be sure, because terminology use by IBM is so unique.

they other thing part of z10->z196 was claim that at least half of the
per processor thruoughput increase was introduction of out-of-order
execution, branch prediction, etc ... i also assumed it implied
moving to micro-ops ...

-- 
virtualization experience starting Jan1968, online at home since Mar1970
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