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@REPLYADDR Scott Lurndal <scott@slp53.sl.home>
@REPLYTO 2:5075/128 Scott Lurndal
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Stephen Fuld <
sfuld@alumni.cmu.edu.invalid> writes:
>On 9/25/2023 10:06 AM, Scott Lurndal wrote:
>> BGB <
cr88192@gmail.com> writes:
>
>>> AFAIK, typical DIMMs have a 64-bit wide interface, and typical MOBOs
>>> have 4 DIMM slots with DIMMs being filled in pairs.
>>
>> "typical" in what context? Home desktops? That`s certainly not
>> typical for the data center or cloud servers. One chip I`m aware of
>> has 20 dual-channel DDR5 memory controllers (one per every four
>> cores).
>
>Wow! How many pins on the package? It must be massive. is there a
>latency penalty for getting that many DIMMs "close" to the CPU?
Further deponent sayeth not.
--- xrn 9.03-beta-14-64bit
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