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@REPLYADDR Michael S <already5chosen@yahoo.com>
@REPLYTO 2:5075/128 Michael S
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@PID: G2/1.0
@TID: FIDOGATE-5.12-ge4e8b94
On Tuesday, September 26, 2023 at 11:43:48 PM UTC+3, Michael S wrote:
> On Tuesday, September 26, 2023 at 9:41:36 PM UTC+3, Thomas Koenig wrote:
> > Scott Lurndal <
sc...@slp53.sl.home> schrieb:
> > > One chip I`m aware of
> > > has 20 dual-channel DDR5 memory controllers (one per every four
> > > cores).
> > That is seriously beefy.
> >
> > Hm, let`s see. For Power10, Wikipedia gives 410 GB/s for DDR4
> > and 800 GB/s for DDR6,
> By now, DDR6 is not finalized even as specification. First modules are
> ~2 years away. Something as slow moving as POWER? I don`t believe we
> will see something even full 3 years from now.
>
> Wikipadia is talking about GDDR6 rather than DDR6. GDDR6 is high bandwidth,
> high latency, low capacity variant of DDR4 intended primarily for GPUs.
>
> I would think that in case of POWER10 GDDR6 is applicable only for
> rare specialty systems.
> > DDR5 is probably in the middle, let`s
> > call it 600 GB/s.
> >
> > So, Power10 seems to have more memory bandwidth per core (equivalent
> > to ~12 DDR5 channels for 15 cores), unless you factor in the
> > eight-way SMT.
> >
> > Still, that system you describe is seriously beefy.
> If you want high bandwidth, don`t care about high capacity or
field upgradability,
> but still want DDR5-like latency then LDDR5 looks like better path than GDDR7.
LPDDR5, of course.
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